LMK5C33216 Overview
The LMK5C33216 is a high-performance network clock generator, synchronizer, and jitter attenuator with advanced reference clock selection and hitless switching capabilities designed to meet the stringent requirements of munications infrastructure applications. The LMK5C33216 integrates 3 DPLLs with programmable loop bandwidth and no external loop filters, maximizing flexibility and ease of use. Each DPLL phase locks...
LMK5C33216 Key Features
- BAW APLL with 40 fs RMS jitter at 491.52 MHz
- Three high-performance digital phase locked loops
- Programmable DPLL loop bandwidth from 0.01
- 116 dBc/Hz at 100 Hz offset at 122.88 MHz
- Two differential or single-ended DPLL inputs
- 1 Hz to 800 MHz differential
- Hitless switching with phase cancellation and/or
- Priority based reference selection
- 16 outputs with programmable format
- 1000 MHz LVPECL/LVDS/HSDS