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LMK5C33216 Ultra-Low Jitter Clock Synchronizer

LMK5C33216 Description

www.ti.com LMK5C33216 SNAS750B * NOVEMBER 2020 * REVISLEMD MKA5RCC3H32201261 SNAS750B * NOVEMBER 2020 * REVISED MARCH.
The LMK5C33216 is a high-performance network clock generator, synchronizer, and jitter attenuator with advanced reference clock selection and hitless.

LMK5C33216 Features

* BAW APLL with 40 fs RMS jitter at 491.52 MHz
* Three high-performance digital phase locked loops (DPLLs) with paired analog phase locked loops (APLLs)
* Programmable DPLL loop bandwidth from 0.01 Hz to 4 kHz
* -116 dBc/Hz at 100 Hz offset at 122.88 MHz DPLL TDC nois

LMK5C33216 Applications

* 4G and 5G Wireless Networks
* Base Band Unit (BBU)
* Active Antenna Unit (AAU)
* Remote Radio Unit (RRU)
* Network Switch (5G HUB)

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Ultra-Low Jitter Clock Synchronizer Texas Instruments
Texas Instruments LMK5C33216-like datasheet