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* Qualified for Automotive Applications
* 27-MHz Master Clock Input
* Generated Audio System Clock
– SCKO0: 768 fS (fS = 44.1 kHz)
.
* 27-MHz Master Clock Input
* Generated Audio System Clock
– SCKO0: 768 fS (fS = 44.1 kHz)
&.
The PLL1707 is a low-cost phase-locked loop (PLL) multiclock generator. The PLL1707 can generate four system clocks from a 27-MHz reference input frequency. The clock outputs of the PLL1707 can be controlled by sampling frequency-control pins. The de.
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