* Frequency Range: 988 - 1028 MHz
* Step Size: 1000 KHz
* PLL - Style Package APPLICATIONS
* Basestations
* Mobile Radios
* Satellite Communications PERFORMANCE SPECIFICATIONS Frequency Range RMS Phase Error (100 Hz - 100 KHz) Harmonic Suppression (2nd
PLL1000A Datasheet (103.91 KB)
PLL1000A
Z-Communications
103.91 KB
Phase locked loop.
PLL1000A
9939 Via Pasar
* San Diego, CA 92126 TEL (858) 621-2700 FAX (858) 621-2722
PHASE LOCKED LOOP
Rev A
PHASE NOISE (1 Hz BW, typical)
.
📁 Related Datasheet
PLL102-03 Low Skew Output Buffer (PhaseLink Corporation)
PLL102-04 Low Skew Output Buffer (PhaseLink Corporation)
PLL102-05 Low Skew Output Buffer (PhaseLink Corporation)
PLL102-10 Low Skew Output Buffer (PhaseLink Corporation)
PLL102-108 Programmable DDR Zero Delay Clock Driver (PhaseLink Corporation)
PLL102-109 Programmable DDR Zero Delay Clock Driver (PhaseLink Corporation)
PLL102-15 Low Skew Output Buffer (PhaseLink Corporation)
PLL103-01 Low Skew Buffer (PhaseLink Corporation)
PLL103-02 DDR SDRAM Buffer (PhaseLink Corporation)
PLL103-03 DDR SDRAM Buffer (PhaseLink Corporation)
