PLL103-01 - Low Skew Buffer

PhaseLink Corporation

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Datasheet Details

Part number	PLL103-01
Manufacturer	PhaseLink Corporation
File Size	101.01 KB
Description	Low Skew Buffer
Datasheet	PLL103-01_PhaseLinkCorporation.pdf

PLL103-01 Product details

Description

Name SDRAM (0:3) SDRAM (4:7) SDRAM (8:11) SDRAM (12:15) www.DataSheet4U.com Number 4,5,8,9 13,14,17,18 31,32,35,36 40,41,44,45 21,28 38 11 24 25 3,7,12,16,20,2 9,33,37,42,46 23 6,10,15,19,22, 27,30,34,39,43 26 1,2,47,48 Type O O O O O I I B I P P P P SDRAM Byte0 Clock outputs.SDRAM Byte1 Clock outputs.SDRAM Byte2 Clock outputs.SDRAM Byte3 Clock outputs.SDRAM Byte4 Clock outputs.Description SDRAM (16:17) OE BUF_IN SDATA SCLK VDD VDD1 GND GND1 N/C Tristates all outputs, active low.Has

Features

Generate 18 copies of High-speed clock inputs. Supports up to four SDRAM DIMMS synchronous clocks.
Supports 2-wire I2C serial bus interface with readback.
50% duty cycle with low jitter.
Less than 5ns delay. www. DataSheet4U. com.
Skew between any outputs is less than 250 ps.
Tri-state pin for testing.
Frequency up to 133 MHZ.
3.0V-3.7V Supply range.
48-pin SSOP package.
PIN.

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Published: Oct 28, 2008 |