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PLL103-04 1-to-4 Clock Distribution Buffer

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Description

Preliminary PLL103-04 1-to-4 Clock Distribution Buffer .
The PLL103-04 is a 1-to-4 Clock Distribution Buffer, reproducing the reference input frequency (FIN) at 4 different outputs.

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Datasheet Specifications

Part number
PLL103-04
Manufacturer
PhaseLink Corporation
File Size
150.92 KB
Datasheet
PLL103-04_PhaseLinkCorporation.pdf
Description
1-to-4 Clock Distribution Buffer

Features

* 4 outputs identical to FIN. Low skew (< 250 ps between outputs). Input / Output frequency range 0
* 160 MHz 25mA drive capability at TTL levels. 70mA drive capability at CMOS levels. Output enable mode available to tri-state all outputs. www. DataSheet4U. com
* 3.3V operation.

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