PLL102-109 Datasheet, Driver, PhaseLink Corporation

PLL102-109 Features

• Driver PLL clock distribution optimized for Double Data Rate SDRAM application up to 266Mhz.
• Distributes one clock Input to one bank of six differential outputs.
• Track spre

PDF File Details

Part number:

PLL102-109

Manufacturer:

PhaseLink Corporation

File Size:

199.76kb

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📄 Datasheet

Description:

Programmable ddr zero delay clock driver. The PLL102-109 is a zero delay buffer that distributes a single-ended clock input to six pairs of differential clock outputs and one

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PLL102-109

PhaseLink Corporation

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