Datasheet Summary
OCTAL TTL-TO-ECL TRANSLATOR WITH D-TYPE
EDGE-TRIGGERED FLIP-FLOPS AND OUTPUT ENABLE
SDZS014A
- APRIL 1990
- REVISED JANUARY 1999
D 10KH patible D TTL Clock and ECL Control Inputs D Noninverting Outputs D Flow-Through Architecture Optimizes PCB
Layout
D Center Pin VCC, VEE, and GND Configurations
Minimize High-Speed Switching Noise
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015
D Package Options Include Plastic Small-Outline
(DW) Package and Standard Plastic (NT) DIPs description
This octal TTL-to-ECL translator is designed to provide efficient translation between a TTL signal environment and a 10KH ECL signal environment. This device is designed specifically...