SN10KHT5578
description
This octal TTL-to-ECL translator is designed to provide efficient translation between a TTL signal environment and a 10KH ECL signal environment. This device is designed specifically to improve the performance and density of TTL-to-ECL CPU/bus-oriented functions such as memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
DW OR NT PACKAGE (TOP VIEW)
1Q 2Q 3Q 4Q GND GND GND GND 5Q 6Q 7Q 8Q
1 2 3 4 5 6 7 8 9 10 11 12
24 1D 23 2D 22 3D 21 4D 20 OE(ECL) 19 VCC 18 VEE 17 CLK(TTL) 16 5D 15 6D 14 7D 13 8D
The eight flip-flops of the ’5578 are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs are set to the logic levels that were set up at the D inputs.
The output-control input OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are off.
The SN10KHT5578 is characterized for operation from 0°C to 75°C.
FUNCTION TABLE
INPUTS...
