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SN54HC11 - Triple 3-Input AND Gates

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General Description

This device contains three independent 3-input AND gates.

Each gate performs the Boolean function Y = A ● B ● C in positive logic.

Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74HC11DR SOIC (14) 8.70 mm × 3.90 mm SN74HC11NR PDIP (14) 19.30 mm × 6.40 mm SN74HC11NSR SO (14) 10.20 mm × 5.30 mm SN74HC11PWR TSSOP (14) 5.00 mm × 4.40 mm SN54HC11JR CDIP (14) 21.30 mm × 7.60 mm SN54HC11WR CFP (14) 9.20 mm × 6.29 mm SN54HC11FKR LCCC (20) 8.90 mm × 8.90 mm (1) For all available packages, see the orderable addendum at the end of the data sheet.

Overview

www.ti.com SCLS084E – DECEMBERSS19NN877244–HHRCCEV11I11S,,ESSDNNAP55R44IHHL CC20112111 SCLS084E – DECEMBER 1982 – REVISED APRIL 2021 SNx4HC11 Triple 3-Input AND Gates.

Key Features

  • Buffered inputs.
  • Wide operating voltage range: 2 V to 6 V.
  • Wide operating temperature range:.
  • 40°C to +85°C.
  • Supports fanout up to 10 LSTTL loads.
  • Significant power reduction compared to LSTTL logic ICs 2.

More Datasheets from Texas Instruments

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SN54HC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS
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SN54HC10J TRIPLE 3-INPUT POSITIVE-NAND GATES
SN54HC125 Quadruple Buffers
SN54HC125J Quadruple Buffers
SN54HC126 Quadruple Buffers
SN54HC126J Quadruple Buffers
SN54HC132 Quadruple Positive-NAND Gates
SN54HC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS