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SN65LVDS32A - HIGH-SPEED DIFFERENTIAL RECEIVERS

Description

This family of differential line receivers offer improved performance and

Features

  • that implement the electrical characteristics of low-voltage differential signaling (LVDS). LVDS is defined in the TIA/EIA-644 standard. This improved performance represents the second generation of receiver products for this standard providing a better overall solution for the cabled environment. The next generation family of products is an extension to TI’s overall product portfolio and is not necessarily a replacement for older LVDS receivers. Improved features include an input commonmode vol.

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Full PDF Text Transcription

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SN65LVDS32A, SN65LVDT32A, SN65LVDS3486A SN65LVDT3486A, SN65LVDS9637A, SN65LVDT9637A HIGH-SPEED DIFFERENTIAL RECEIVERS SLLS368C – JULY 1999 – REVISED JANUARY 2000 D Meets or Exceeds the Requirements of ANSI EIA/TIA-644 Standard for Signaling Rates† Up to 400 Mbps D Operates With a Single 3.3 V Supply D –2 V to 4.4 V Common-Mode Input Voltage Range D Differential Input Thresholds <50 mV With 50 mV of Hysteresis Over Entire Common-Mode Input Voltage Range D Integrated 110Ω Line Termination Resistors Offered With the LVDT Series D Propagation Delay Times 4 ns (typ) D Open-Circuit and Terminated Fail Safe Assures a High-Level Output With No Input D Bus-Pin ESD Protection Exceeds 15 kV HBM D Outputs High-Impedance With VCC < 1.
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