Datasheet Summary
D Members of the Texas Instruments
Widebus ™ Family
D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design
Significantly Reduces Power Dissipation
D Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
D High-Impedance State During Power Up and Power Down
D Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
D Flow-Through Architecture Optimizes PCB
Layout
D High-Drive Outputs (- 32-mA IOH, 64-mA IOL) D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown Resistors
D Latch-Up Performance Exceeds 500 mA Per
JESD 17
D Package Options Include Plastic Shrink
Small-Outline (DL), Thin Shrink Small-Outline (DGG), and Thin Very Small-Outline (DGV)...