Description
This single 2-input positive-NAND gate performs the Boolean function Y = A × B or Y = A + B in positive logic.
Features
- 1 ESD Performance Tested Per JESD 22.
- 2000-V Human-Body Model (A114-B, Class II).
- 1000-V Charged-Device Model (C101).
- Available in the Ultra Small 0.64 mm2 Package
(DPW) with 0.5-mm Pitch.
- Low Static-Power Consumption (ICC = 0.9 µA Max).
- Low Dynamic-Power Consumption (Cpd = 4 pF Typical at 3.3 V).
- Low Input Capacitance (Ci = 1.5 pF Typical).
- Low Noise Overshoot and Undershoot.