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74ALVT16821 - 20-bit bus interface D-type flip-flop

Description

The 74ALVT16821 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.

It is designed for VCC operation at 2.5 V or 3.3 V with I/O compatibility to 5 V.

Features

  • 20-bit positive-edge triggered register.
  • 5 V I/O compatible.
  • Multiple VCC and GND pins minimize switching noise.
  • Bus hold data inputs eliminate the need for external pull-up resistors to hold unused inputs.
  • Live insertion and extraction permitted.
  • Power-up reset.
  • Power-up 3-state.
  • Output capability: +64 mA and -32 mA.
  • Latch-up protection:.
  • JESD78: exceeds 500 mA.
  • ESD protection:.
  • MIL STD.

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Datasheet Details

Part number 74ALVT16821
Manufacturer nexperia
File Size 207.12 KB
Description 20-bit bus interface D-type flip-flop
Datasheet download datasheet 74ALVT16821 Datasheet
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74ALVT16821 20-bit bus interface D-type flip-flop; positive-edge trigger; 3-state Rev. 4 — 22 January 2018 Product data sheet 1 General description The 74ALVT16821 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. It is designed for VCC operation at 2.5 V or 3.3 V with I/O compatibility to 5 V. The 74ALVT16821 has two 10-bit, edge triggered registers, with each register coupled to a 3-state output buffer. The two sections of each register are controlled independently by the clock (nCP) and output enable (nOE) control gates. Each register is fully edge triggered. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flops Q output.
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