logo

74AUP1G3208 Datasheet, nexperia

74AUP1G3208 Datasheet, nexperia

74AUP1G3208

datasheet Download (Size : 272.00KB)

74AUP1G3208 Datasheet

74AUP1G3208 gate equivalent, low-power 3-input or-and gate.

74AUP1G3208

datasheet Download (Size : 272.00KB)

74AUP1G3208 Datasheet

Features and benefits


* Wide supply voltage range from 0.8 V to 3.6 V
* High noise immunity
* Complies with JEDEC standards:
* JESD8-12 (0.8 V to 1.3 V)
* JESD8-11 (0.9 V t.

Application

using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the dev.

Description

The 74AUP1G3208 is a single 3-input OR-AND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.

Image gallery

74AUP1G3208 Page 1 74AUP1G3208 Page 2 74AUP1G3208 Page 3

TAGS

74AUP1G3208
Low-power
3-input
OR-AND
gate
nexperia

Manufacturer


nexperia (https://www.nexperia.com/)

Related datasheet

74AUP1G32

74AUP1G32-Q100

74AUP1G332

74AUP1G34

74AUP1G34-Q100

74AUP1G373

74AUP1G373-Q100

74AUP1G374

74AUP1G374-Q100

74AUP1G38

74AUP1G386

74AUP1G00

74AUP1G00-Q100

Since 2006. D4U Semicon.   |   Contact Us   |   Privacy Policy   |   Purchase of parts