74AUP1G3208 Datasheet - NXP

74AUP1G3208, Low Power 3-Input OR-AND Gate

www.DataSheet4U.com 74AUP1G3208 Low-power 3-input OR-AND gate Rev.01 * 29 November 2006 Product data sheet 1.General .
The 74AUP1G3208 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Features

* s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s Complies with JEDEC standards: x JESD8-12 (0.8 V to 1.3 V) x JESD8-11 (0.9 V to 1.65 V) x JESD8-7 (1.2 V to 1.95 V) x JESD8-5 (1.8 V to 2.7 V) x JESD8-B (2.7 V to 3.6 V) s ESD protection: x HBM JESD22-A114-D Class 3A exceeds 500

Applications

* using IOFF. The IOFF circuitry disables the output, preventing the damaging backﬂow current through the device when it is powered down. The 74AUP1G3208 provides the Boolean function: Y = (A + B) × C. The user can choose the logic functions OR, AND and OR-AND. All inputs can be connected to VCC or GN

74AUP1G3208_PhilipsSemiconductors.pdf