74AUP1G386 Datasheet (NXP Semiconductors) - Low-power 3-input EXCLUSIVE-OR gate

74AUP1G386, Low-power 3-input EXCLUSIVE-OR gate

The 74AUP1G386 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

This device

74AUP1G386 Features

* s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s Complies with JEDEC standards: x JESD8-12 (0.8 V to 1.3 V) x JESD8-11 (0.9 V to 1.65 V) x JESD8-7 (1.2 V to 1.95 V) x JESD8-5 (1.8 V to 2.7 V) x JESD8-B (2.7 V to 3.6 V) s ESD protection: x HBM JESD22-A114E Class 3A exceeds 5000