74HC109D
Description
The 74HC109; 74HCT109 is a dual positive edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) inputs, set (SD) and reset (RD) inputs and plementary Q and Q outputs.
Key Features
- J and K inputs for easy D-type flip-flop
- Toggle flip-flop or "do nothing" mode
- Wide supply voltage range
- CMOS low power dissipation
- High noise immunity
- Input levels
- For 74HC109: CMOS level
- For 74HCT109: TTL level
- Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
- 74HC109 plies with JEDEC standards
