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74LVC3G14 - Triple inverting Schmitt trigger

Description

The 74LVC3G14 provides three inverting buffers with Schmitt trigger input.

It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

The inputs can be driven from either 3.3 V or 5 V devices.

Features

  • Wide supply voltage range from 1.65 V to 5.5 V.
  • 5 V tolerant input/output for interfacing with 5 V logic.
  • High noise immunity.
  • ESD protection:.
  • HBM JESD22-A114F exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200 V.
  • ±24 mA output drive (VCC = 3.0 V).
  • CMOS low power consumption.
  • Latch-up performance exceeds 250 mA.
  • Direct interface with TTL levels.
  • Unlimited rise and fall times.
  • Multiple package.

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Datasheet preview – 74LVC3G14

Datasheet Details

Part number 74LVC3G14
Manufacturer nexperia
File Size 278.10 KB
Description Triple inverting Schmitt trigger
Datasheet download datasheet 74LVC3G14 Datasheet
Additional preview pages of the 74LVC3G14 datasheet.

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Full PDF Text Transcription

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74LVC3G14 Triple inverting Schmitt trigger with 5 V tolerant input Rev. 15 — 3 January 2019 Product data sheet 1. General description The 74LVC3G14 provides three inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt trigger action at the inputs makes the circuit tolerant of slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2.
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