74LVC3G04 - TRIPLE INVERTER GATE

DIODES

74LVC3G04 Datasheet Preview — Preview of 74LVC3G04 PDF

Datasheet Details

Part number	74LVC3G04
Manufacturer	DIODES ↗
File Size	574.78 KB
Description	TRIPLE INVERTER GATE
Datasheet	74LVC3G04-DIODES.pdf

74LVC3G04 Product details

Description

Pin Assignments The 74LVC3G04 is a triple inverter gate with standard push-pull outputs.The device is designed for operation with a power supply range of 1.65V to 5.5V.The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment.The device is fully specified for partial power down applications using IOFF.The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down.Each of the inverters performs the positive

Features

Wide Supply Voltage Range from 1.65V to 5.5V.
±24mA Output Drive at 3.3V.
CMOS Low-Power Consumption.
IOFF Supports Partial Power Down Mode Operation.
Inputs Accept up to 5.5V.
ESD Protection Tested per JESD 22 Exceeds 2000V Human Body Model (A114) Exceeds 1000V Charged Device Model (C101).
Latch-Up Exceeds 100mA per JESD 78, Class I.
Range of Package Options.
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2).
Halogen and Antimony Free. “Gr.

📁 74LVC3G04 Similar Datasheet

74LVC3G04-Q100 - Triple inverter (nexperia)
74LVC3G06 - Triple inverter (NXP Semiconductors)
74LVC3G07 - Triple buffer (NXP Semiconductors)
74LVC3G07-Q100 - Triple buffer (nexperia)
74LVC3G14 - Triple inverting Schmitt trigger (NXP)
74LVC3G16 - Triple buffer (nexperia)
74LVC3G17 - Triple non-inverting Schmitt trigger (NXP)
74LVC3G17-Q100 - Triple non-inverting Schmitt trigger (nexperia)

Other Datasheets by DIODES

74LVCE1G00 - SINGLE 2 INPUT POSITIVE NAND GATE
74LVCE1G06 - SINGLE INVERTER BUFFER/DRIVER
74LVCE1G125 - SINGLE BUFFER GATE
74LVCE1G126 - SINGLE BUFFER GATE
74LVCE1G86 - SINGLE 2 INPUT EXCLUSIVE OR GATE
74LVCH2T45 - DUAL BIT DUAL POWER SUPPLY TRANSLATING TRANSCEIVER

Published: Aug 27, 2023 |