74LVC3G07 Datasheet - NXP Semiconductors

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74LVC3G07 Triple buffer

74LVC3G07 Triple buffer with open-drain output Rev.03 * 01 February 2005 www.DataSheet4U.com Product data sheet 1.General .
The 74LVC3G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.

74LVC3G07_NXPSemiconductors.pdf

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Datasheet Details

Part number:

74LVC3G07

Manufacturer:

NXP ↗ Semiconductors

File Size:

108.68 KB

Description:

Triple buffer

Features

* s s s s Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8-B/JESD36 (2.7 V to 3.6 V). ESD protection: x HBM EIA/JESD22-A114-B exceeds

Applications

* using Ioff. The Ioff circuitry disables the output, preventing the damaging backﬂow current through the device when it is powered down. The 74LVC3G07 provides three non-inverting buffers. The output of the device is an open drain and can be connected to other open-drain outputs to implement active-L

74LVC3G07 Distributors

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74LVC3G07 Triple buffer NXP Semiconductors

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