DL00x is a family of transparent, unbuffered D latch with active low gate transparency and without SET or RESET. Logic Symbol Truth Table DL00x DQ G GN D Q LLL L HH H X NC NC = No Change HDL Syntax Verilog DL00x inst_name (Q, D, GN); VHDL inst_name: DL00x port map (Q, D, GN); Pin Loading Pin .
