DL011 - CMOS Gate Array
DL011 is a transparent, unbuffered D latch with active low gate transparency.
RESET is active low.
Logic Symbol Truth Table Pin Loading DL011 DQ G R RN D GN Q HLLL HH L H H X H NC LXXL NC = No Change Equivalent Load D 1.0 GN 1.0 RN 1.0 ® Equivalent Gates 5.0 HDL Syntax Verilog DL011 inst_n
