* n Fast access time: 4.5/5.0/6.0 ns (117/100/83MHz) n Direct Bus Alternation between READ and WRITE cycles allows 100% bus utilization n Signal +3.3V ± 5% power supply n Individual Byte Write control capability n Clock enable ( CEN ) pin to enable clock and suspend operations n Clock-controlled and r
A67L8316 Datasheet (272.85 KB)
A67L8316
AMIC Technology
272.85 KB
256k x 16/18/ 128k x 32/36 lvttl/ pipelined dba sram.
A67L8316/A67L8318/ A67L7332/A67L7336 Series 256K X 16/18, 128K X 32/36 Preliminary Document Title 256K X 16/18, 128K X 32/36 LVTTL, Pipelined DBA SRAM.
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