* n Fast access time: 10/11/12 ns (100, 90, 83 MHz) n Direct Bus Alternation between READ and WRITE cycles allows 100% bus utilization n Signal +3.3V ± 5% power supply n Individual Byte Write control capability n Clock enable ( CEN ) pin to enable clock and suspend operations n Clock-controlled and re
A67L83181 Datasheet (271.55 KB)
A67L83181
AMIC Technology
271.55 KB
256k x 16/18/ 128k x 32/36 lvttl/ flow-through dba sram.
A67L83161/A67L83181/ A67L73321/A67L73361 Series 256K X 16/18, 128K X 32/36 Preliminary Document Title 256K X 16/18, 128K X 32/36 LVTTL, Flow-through D.
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