A67L8318 - 256K X 16/18/ 128K X 32/36 LVTTL/ Pipelined DBA SRAM

AMIC Technology

The A67L8318 by AMIC Technology is a 256K X 16/18/ 128K X 32/36 LVTTL/ Pipelined DBA SRAM. Below is the official datasheet preview.

Datasheet Details

Part number	A67L8318
Manufacturer	AMIC Technology
File Size	272.85 KB
Description	256K X 16/18/ 128K X 32/36 LVTTL/ Pipelined DBA SRAM
Datasheet	A67L8318_AMICTechnology.pdf
Additional preview pages of the A67L8318 datasheet.

The AMIC Direct Bus Alternation™ (DBA™) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process.

n Fast access time: 4.5/5.0/6.0 ns (117/100/83MHz) n Direct Bus Alternation between READ and WRITE cycles allows 100% bus utilization n Signal +3.3V ± 5% power supply n Individual Byte Write control capability n Clock enable ( CEN ) pin to enable clock and suspend operations n Clock-controlled and registered address, data and control signals n Registered output for pipelined.

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Published: Mar 23, 2005 |