The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process.
The A67L9318, A67L8336 SRAMs integrate a 512K X 18, 256K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter.
These SRAMs are optimized for 10
A67L9318 Features
* Fast access time: 2.6/2.8/3.2/3.5/3.8/4.2 (250/227/200/166/150/133MHz) Zero Bus Latency between READ and WRITE cycles allows 100% bus utilization Signal +3.3V ± 5% power supply Individual Byte Write control capability Clock enable ( CEN ) pin to enable clock and suspend operations Clock-controlled a
Datasheet Details
A67L9318, A67L8336
AMIC Technology
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512k x 18- 256k x 36 lvttl / pipelined zebl sram.
This datasheet PDF includes multiple part numbers: A67L9318, A67L8336.
Please refer to the document for exact specifications by model.
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