The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process.
The A67L93181, A67L83361 SRAMs integrate a 512K X 18, 256K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter.
These SRAMs are optimized for
A67L93181 Features
* Fast access time: 6.5/7.5/8.5 ns (153, 133, 117 MHz) Zero Bus Latency between READ and WRITE cycles allows 100% bus utilization Signal +3.3V ± 5% power supply Individual Byte Write control capability Clock enable ( CEN ) pin to enable clock and suspend operations Clock-controlled and registered addr
Datasheet Details
A67L93181, A67L83361
AMIC Technology
280.34 KB
512k x 18- 256k x 36 lvttl / flow-through zebl sram.
This datasheet PDF includes multiple part numbers: A67L93181, A67L83361.
Please refer to the document for exact specifications by model.
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