* Fast access time: 6.5/7.5/8.5 ns (153, 133, 117 MHz) Zero Bus Latency between READ and WRITE cycles allows 100% bus utilization Signal +3.3V ± 5% power supply Individual Byte Write control capability Clock enable ( CEN ) pin to enable clock and suspend operations Clock-controlled and registered addr
A67L93361 Datasheet (244.27 KB)
A67L93361
AMIC Technology
244.27 KB
(a67l06181 / a67l93361) flow-through zebl sram.
A67L06181/A67L93361 Preliminary Document Title 1M X 18, 512K X 36 LVTTL, Flow-through ZeBLTM SRAM Revision History Rev. No. 0.0 1M X 18, 512K X 36 LV.
📁 Related Datasheet
A67L9336 (A67L0618 / A67L9336) Pipelined ZeBL SRAM (AMIC Technology)
A67L9318 512K X 18- 256K X 36 LVTTL / Pipelined ZeBL SRAM (AMIC Technology)
A67L93181 512K X 18- 256K X 36 LVTTL / Flow-through ZeBL SRAM (AMIC Technology)
A67L0618 Pipelined ZeBL SRAM (AMIC Technology)
A67L06181 Flow-through ZeBL SRAM (AMIC Technology)
A67L0636 2M X 18- 1M X 36 LVTTL Pipelined ZeBL SRAM (AMIC Technology)
A67L1618 2M X 18- 1M X 36 LVTTL Pipelined ZeBL SRAM (AMIC Technology)
A67L7332 256K X 16/18/ 128K X 32/36 LVTTL/ Pipelined DBA SRAM (AMIC Technology)
A67L73321 256K X 16/18/ 128K X 32/36 LVTTL/ Flow-through DBA SRAM (AMIC Technology)
A67L7336 256K X 16/18/ 128K X 32/36 LVTTL/ Pipelined DBA SRAM (AMIC Technology)
