AS7C331MNTD18A Datasheet (Alliance Semiconductor Corporation)

AS7C331MNTD18A, 3.3V 1M x 18 Pipelined SRAM

The AS7C331MNTD18A family is a high performance CMOS 16 Mbit synchronous Static Random Access Memory (SRAM) organized as 1,048,576 words × 18 bits and incorporates a LATE LATE Write.

This variation of the 16Mb+ synchronous SRAM uses the No Turnaround Delay (NTD™) architecture, featuring an enhanced

AS7C331MNTD18A Features

* Organization: 1,048,576 words × 18 bits NTD™ architecture for efficient bus operation Fast clock speeds to 166 MHz Fast clock to data access: 3.4/3.8 ns Fast OE access time: 3.4/3.8 ns Fully synchronous operation Asynchr