AS7C33512NTD18A Datasheet (Alliance Semiconductor Corporation) - 3.3V 512K x 18 Pipelined burst Synchronous SRAM

AS7C33512NTD18A, 3.3V 512K x 18 Pipelined burst Synchronous SRAM

The AS7C33512NTD18A family is a high performance CMOS 8 Mbit synchronous Static Random Access Memory (SRAM) organized as 524,288 words × 18 bits and incorporates a LATE LATE Write.

This variation of the 8Mb sychronous SRAM uses the No Turnaround Delay (NTD™) architecture, featuring an enhanced write

AS7C33512NTD18A Features

* Organization: 524,288 words × 18 bits

* NTD™ architecture for efficient bus operation

* Fast clock speeds to 166 MHz

* Fast clock to data access: 3.5/4.0 ns

* Fast OE access time: 3.5/4.0 ns

* Fully synchronous operation www.DataSheet4U.com