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AS7C33512NTD18A 3.3V 512K x 18 Pipelined burst Synchronous SRAM

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Description

November 2004 ® AS7C33512NTD18A 3.3V 512K × 18 Pipelined burst Synchronous SRAM with NTDTM .
The AS7C33512NTD18A family is a high performance CMOS 8 Mbit synchronous Static Random Access Memory (SRAM) organized as 524,288 words × 18 bits and i.

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Features

* Organization: 524,288 words × 18 bits
* NTD™ architecture for efficient bus operation
* Fast clock speeds to 166 MHz
* Fast clock to data access: 3.5/4.0 ns
* Fast OE access time: 3.5/4.0 ns
* Fully synchronous operation www. DataSheet4U. com

Applications

* requiring random access or read-modify-write operations. NTD™ devices use www. DataSheet4U. com the memory bus more efficiently by introducing a write 'latency' which matches the two cycle pipeline and one cycle flowthrough read latency. Write data is applied two cycles after the write command and add

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