AS7C3364NTD36B - (AS7C3364NTD32B / AS7C3364NTD36B) 3.3V 64K x 32/36 Pipelined SRAM
The AS7C3364NTD36B family is a high performance CMOS 2 Mbit synchronous Static Random Access Memory (SRAM) organized as 65,536 words × 32 or 36 bits and incorporates a LATE LATE Write.
This variation of the 2Mb sychronous SRAM uses the No Turnaround Delay (NTD™) architecture, featuring an enhanced w
AS7C3364NTD36B Features
* Organization: 65,536 words × 32 or 36 bits
* NTD™ architecture for efficient bus operation
* Fast clock speeds to 200 MHz
* Fast clock to data access: 3.0/3.5/4.0 ns
* Fast OE access time: 3.0/3.5/4.0 ns
* Fully synchronous operation
* Asynch
