• Part: AS4C256M16D3L
  • Description: 256M x 16 bit DDR3L Synchronous DRAM
  • Manufacturer: Alliance Semiconductor
  • Size: 2.04 MB
Download AS4C256M16D3L Datasheet PDF
Alliance Semiconductor
AS4C256M16D3L
Features - JEDEC Standard pliant - Power supplies: VDD & VDDQ = +1.35V - Backward patible: VDD & VDDQ = 1.5V +/- 0.075V - Operating temperature: - mercial (0 ~ 95°C) - Industrial (-40 ~ 95°C) - Supports JEDEC clock jitter specification - Fully synchronous operation - Fast clock rate: 800MHz - Differential Clock, CK & CK# - Bidirectional differential data strobe -DQS & DQS# - 8 internal banks for concurrent operation - 8n-bit prefetch architecture - Internal pipeline architecture - Precharge & active power down - Programmable Mode & Extended Mode registers - Additive Latency (AL): 0, CL-1, CL-2 - Programmable Burst lengths: 4, 8 - Burst type: Sequential / Interleave - Output Driver Impedance Control - 8192 refresh cycles / 64ms - Average refresh period 7.8μs @ -40℃ ≦TC≦ +85℃ 3.9μs @ +85℃ <TC≦ +95℃ - Write Leveling - OCD Calibration - Dynamic ODT (Rtt_Nom & Rtt_WR) - Ro HS pliant - Auto Refresh and Self Refresh - 96-ball 9 x 13 x 1.2mm FBGA package - Pb and Halogen Free Overview The 4Gb...