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AS4C32M16D1A-C 32M x 16 bit DDR Synchronous DRAM

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Description

Revision History Revision Details Rev 1.0 Preliminary datasheet AS4C32M16D1A-C&I Date March 2015 Alliance Memory Inc.511 Taylor Way, San Carlos, CA.

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Features

* Fast clock rate: 200MHz
* Differential Clock CK & CK
* Bi-directional DQS
* DLL enable/disable by EMRS
* Fully synchronous operation
* Internal pipeline architecture
* Four internal banks, 8M x 16-bit for each bank
* Programmable Mode and Extended Mode registers - C

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