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AS7C331MNTD18A - 3.3V 1M x 18 Pipelined SRAM

AS7C331MNTD18A Description

December 2004 ® AS7C331MNTD18A 3.3V 1M x 18 Pipelined SRAM with NTDTM .
The AS7C331MNTD18A family is a high performance CMOS 16 Mbit synchronous Static Random Access Memory (SRAM) organized as 1,048,576 words × 18 bits and.

AS7C331MNTD18A Features

* Organization: 1,048,576 words × 18 bits NTD™ architecture for efficient bus operation Fast clock speeds to 166 MHz Fast clock to data access: 3.4/3.8 ns Fast OE access time: 3.4/3.8 ns Fully synchronous operation Asynchr

AS7C331MNTD18A Applications

* requiring random access or read-modify-write operations. NTD™ devices use the memory bus more efficiently by introducing a write latency which matches the two-cycle pipelined or one-cycle flow-through read latency. Write data is applied two cycles after the write command and address, allowing the re

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