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AS7C34096A 3.3V 512K x 8 CMOS SRAM

AS7C34096A Description

February 2004 e e hAS7C34096 * Pin compatible to S * Industrial and commercial temperature a 524,288 words × 8 bits t * Organ.
The AS7C34096A is a high-performance CMOS 4,194,304-bit Static Random Access Memory (SRAM) device organized as 524,288 words × 8 bits.

AS7C34096A Features

* - 10/12/15/20 ns address access time - 4/5/6/7 ns output enable access time - 650 mW / max @ 10 ns - 18 mW / max CMOS U 4 t . c om AS7C34096A ® 3.3V 512K × 8 CMOS SRAM
* Equal access and cycle times
* Easy memory expansion with CE, OE inputs
* TTL-compatible, three-state

AS7C34096A Applications

* where fast data access, low power, and simple interfacing are desired. Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 4/5/6/7 ns are ideal for high-performance applications. The chip enable input CE permits easy memory expansion with m

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3.3V 512K CMOS SRAM Alliance Semiconductor Corporation
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