EPM7032 Datasheet - Altera

EPM7032 - Programmable Logic

MAX 7000 Programmable Logic Device Family Data Sheet * Additional design entry and simulation support provided by EDIF 2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM), Verilog HDL, VHDL, and other interfaces to popular EDA tools from manufacturers such as Cadence, Exemplar

EPM7032 Features

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* High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX® architecture

* 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices

* ISP circuitry com

EPM7032-Altera.pdf