Datasheet Specifications
- Part number
- PA7572
- Manufacturer
- Anachip
- File Size
- 349.21 KB
- Datasheet
- PA7572_Anachip.pdf
- Description
- Programmable Electrically Erasable Logic
Description
PA7572 PEEL Array™ Programmable Electrically Erasable Logic Array Versatile Logic Array Architecture - 24 I/Os, 14 inputs, 60 registers/latches - Up t.Features
* - Independent or global clocks, resets, presets, clock polarity and output enables - Sum-of-products logic for output enables Development and Programmer Support - ICT PLACE Development Software - Fitters for ABEL, CUPL and other software - Programming support by popular third-party programmers GeneApplications
* - Integration of multiple PLDs and random logic - Buried counters, complex state-machines - Comparators, decoders, other wide-gate functions CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Flexible Logic Cell - Up to 3 output functions per logic cePA7572 Distributors
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