AD9525 Datasheet (Analog Devices) - Low Jitter Clock Generator

AD9525, Low Jitter Clock Generator

The AD9525 is designed to support converter clock requirements for long-term evolution (LTE) and multicarrier GSM base station designs.

The AD9525 provides a low power, multioutput, clock distribution function with low jitter performance, along with an on-chip PLL that can be used with an external V

AD9525 Features

* Integrated ultralow noise synthesizer 8 differential 3.6 GHz LVPECL outputs and 1 LVPECL SYNC output or 2 CMOS SYNC outputs 2 differential reference inputs and 1 single-ended reference input APPLICATIONS LTE and multicarrier GSM base stations Clocking high speed ADCs, DACs ATE and high performance i