AD9554 Datasheet - Analog Devices

AD9554, Multiservice Line Card Adaptive Clock Translator

Data Sheet Quad PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator AD9554 .
The AD9554 is a low loop bandwidth clock translator that provides jitter cleanup and synchronization for many systems, including synchronous optical n.

AD9554-AnalogDevices.pdf

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Datasheet Details

Part number:

AD9554

Manufacturer:

Analog Devices ↗

File Size:

1.03 MB

Description:

Multiservice Line Card Adaptive Clock Translator

Features

* Supports GR-1244 Stratum 3 stability in holdover mode Supports smooth reference switchover with virtually no disturbance on output phase Supports Telcordia GR-253 jitter generation, transfer, and tolerance for SONET/SDH up to OC-192 systems Supports ITU-T G.8262 synchronous Ethernet slave clocks Sup

Applications

* Quad digital phase-locked loop (DPLL) architecture with four reference inputs (single-ended or differential) 4 × 4 crosspoint allows any reference input to drive any PLL Input reference frequencies from 2 kHz to 1000 MHz Reference validation and frequency monitoring: 2 ppm Programmable input referen

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AD9554 Multiservice Line Card Adaptive Clock Translator Analog Devices

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