ADSP-21267 - Preliminary Technical Data
The ADSP-21267 SHARC DSP is a member of the SIMD SHARC family of DSPs featuring Analog Devices' Super Harvard Architecture.
The ADSP-21267 is source code compatible with the ADSP-2136x, and ADSP-2116x DSPs as well as with first generation ADSP-2106x SHARC processors in SISD (Single-Instruction, Sing
www.DataSheet4U.com Preliminary Technical Data SUMMARY High performance 32-bit/40-bit floating point processor optimized for high performance audio processing Code compatible with all other SHARC DSPs The ADSP-21267 processes high performance audio while enabling low system costs Audio decoders and post processor-algorithms support.
Non-volatile memory can be configured to contain a combination of PCM 96 kHz, Dolby Digital, Dolby Digital EX2, Dolby Pro Logic IIx, DTS 5.1, DTS ES Discrete 6.1, D
ADSP-21267 Features
* At 150 MHz (6.65 ns) core instruction rate, the ADSP-21267 operates at 900 MFLOPS performance whether operating on fixed or floating point data 300 MMACS sustained performance at 150 MHz Code compatibility
* At assembly level, uses the same instruction set as other SHARC DSPs Super Harvard Arc
