Description
SHARC Processor ADSP-21367/ADSP-21368/ADSP-21369 SUMMARY High performance 32-bit/40-bit floating-point processor optimized for high performance audio.
3 SHARC Family Core Architecture 4 Family Peripheral Architecture 7 I/O Processor Features 10 System Design 10 Development Tools 11 Additional I.
Features
* include
JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit
access under program control to sensitive code PLL has a wide variety of software and hardware multi-
plier/divider ratios Available in 256-ball BGA_ED and 208-lead LQFP_EP
packages
SIMD
Applications
* interface, S/PDIF transceiver, serial ports, 8-channel asynchronous sample rate converter, precision clock generators, and more. For complete ordering information, see Ordering Guide on Page 61.
DEDICATED AUDIO COMPONENTS
S/PDIF-compatible digital audio receiver/transmitter 4 independent asynchrono