Description
SHARC+ Dual-Core DSP with Arm Cortex-A5 ADSP-21593/21594/ADSP-SC592/SC594 SYSTEM .
3
ARM Cortex-A5 Processor (ADSP-SC592/SC594 Only) 5
SHARC Processor 6 SHARC+ Core Architecture 8 System Infrastructure 10 System Memory Map 11 S.
Features
* Dual-enhanced SHARC+ floating-point cores High performance SHARC+ cores (up to 1 GHz each) Up to 5 Mb (640 kB) L1 SRAM memory per core with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed-point support Byte, short word, word, and long wo
Applications
* APPLICATIONS
Automotive: audio amplifier, head unit, ANC/RNC, rear seat entertainment, digital cockpit, ADAS
Consumer: AVRs, mixing consoles, microphone arrays, conferencing systems
SYSTEM CONTROL
SECURITY AND PROTECTION SYSTEM PROTECTION UNIT (SPU)
SYSTEM MEMORY PROTECTION UNIT (SMPU) ENCRYPTION/D