Datasheet Specifications
- Part number
- ADSP-SC570
- Manufacturer
- Analog Devices ↗
- File Size
- 3.75 MB
- Datasheet
- ADSP-SC570-AnalogDevices.pdf
- Description
- SHARC+ Dual-Core DSP
Description
SHARC+ Dual-Core DSP with ARM Cortex-A5 ADSP-SC570/SC571/SC572/SC573/ADSP-21571/21573 SYSTEM .Features
* Dual-enhanced SHARC+ high performance floating-point cores Up to 500 MHz per SHARC+ core Up to 3 Mb (384 kB) L1 SRAM memory per core with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed point Byte, short word, word, long word addressed AApplications
* SYSTEM CONTROL SECURITY AND PROTECTION SYSTEM PROTECTION (SPU) SYSTEM MEMORY PROTECTION UNIT (SMPU) FAULT MANAGEMENT ARMĀ® TrustZoneĀ® SECURITY DUAL CRC WATCHDOGS OTP MEMORY THERMAL MONITOR UNIT (TMU) PROGRAM FLOW SYS EVENT CORE 0 (GIC) SYS EVENT CORES 1-2 (SEC) TRIGGER ROUTING (TRU) CLOCK, RESET, ANADSP-SC570 Distributors
📁 Related Datasheet
📌 All Tags