ADSP-SC572 Features
* Dual-enhanced SHARC+ high performance floating-point cores Up to 500 MHz per SHARC+ core Up to 3 Mb (384 kB) L1 SRAM memory per core with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed point Byte, short word, word, long word addressed A
Datasheet Details
ADSP-SC572, ADSP-SC570
3.75 MB
Sharc+ dual-core dsp.
This datasheet PDF includes multiple part numbers: ADSP-SC572, ADSP-SC570.
Please refer to the document for exact specifications by model.
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