AZ100EL32 Datasheet - Arizona

AZ100EL32 ECL/PECL / 2 Divider

The AZ10/100EL32 is an integrated ÷2 divider. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random logic state; the reset allows for the synchronization of multiple EL32’s in a system. The EL32 provides a VBB output for single-e.

AZ100EL32 Features

* PACKAGE 510ps Propagation Delay 3.0GHz Toggle Frequency High Bandwidth Output Transitions 75kΩ Internal Input Pulldown Resistors Direct Replacement for ON Semiconductor MC10EL32 & MC100EL32 SOIC 8 SOIC 8 SOIC 8 RoHS Compliant / Lead (Pb) Free TSSOP 8

AZ100EL32 Datasheet (130.18 KB)