| Part number | AS4DDR264M72PBG1 |
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| Manufacturer | Austin Semiconductor |
| File Size | 420.00 KB |
| Description | 64Mx72 DDR2 SDRAM w/ SHARED CONTROL BUS iNTEGRATED Plastic Encapsulated Microcircuit |
| Datasheet |
 AS4DDR264M72PBG1 Datasheet
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On-Die-Termination: Registered High enables on data bus termination Differential input clocks, one set for each x16bits Clock enable which activates all on silicon clocking circuitry Chip Selects, one for each 16 bits of the data bus width Command input which along with CAS, WE and CS define operations Command input which along with RAS, WE and CS define operations Command input which along with RAS, CAS and CS define operations One Data Mask cntl.
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