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AS4DDR264M72PBG1

64Mx72 DDR2 SDRAM w/ SHARED CONTROL BUS iNTEGRATED Plastic Encapsulated Microcircuit

AS4DDR264M72PBG1 Features

* DDR2 Data rate = 667, 533, 400 Available in Industrial, Enhanced and Military Temp Package:

* Proprietary Enchanced Die Stacked iPEM

* 208 Plastic Ball Grid Array (PBGA), 16 x 23mm

* 1.00mm ball pitch Differential data strobe (DQS, DQS#) per byte

AS4DDR264M72PBG1 General Description

On-Die-Termination: Registered High enables on data bus termination Differential input clocks, one set for each x16bits Clock enable which activates all on silicon clocking circuitry Chip Selects, one for each 16 bits of the data bus width Command input which along with CAS, WE and CS define operati.

AS4DDR264M72PBG1 Datasheet (420.00 KB)

Preview of AS4DDR264M72PBG1 PDF

Datasheet Details

Part number:

AS4DDR264M72PBG1

Manufacturer:

Austin Semiconductor

File Size:

420.00 KB

Description:

64mx72 ddr2 sdram w/ shared control bus integrated plastic encapsulated microcircuit.
i PEM 4.8 G b SDRAM-DDR2 Gb Austin Semiconductor, Inc. AS4DDR264M72PBG1 64Mx72 DDR2 SDRAM w/ SHARED CONTROL BUS iNTEGRATED Plastic Encapsulated Microc.

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TAGS

AS4DDR264M72PBG1 64Mx72 DDR2 SDRAM SHARED CONTROL BUS iNTEGRATED Plastic Encapsulated Microcircuit Austin Semiconductor

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