AS4DDR232M64PBG - 32M x 64 DDR2 SDRAM

Micross

Datasheet Details

DDR2 Data rate = 667, 533, 400 Available in Industrial, Enhanced and Military Temp Package:.
255 Plastic Ball Grid Array (PBGA), 25 x 32mm.
1.27mm pitch Differential data strobe (DQS, DQS#) per byte Internal, pipelined, double data rate architecture 4-bit prefetch architecture DLL for alignment of DQ and DQS transitions with clock signal Four internal banks for concurrent operation (Per DDR2 SDRAM Die) Programmable Burst lengths: 4 or 8 Auto Refresh and Self Refresh Modes On Di.

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Published: Jan 8, 2017 |