AS5SP1M36DQ Datasheet (Austin Semiconductor)

AS5SP1M36DQ, 36Mb Pipelined Sync SRAM

The AS5SP1M36DQ SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation.

All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK).

The synchronous inputs

AS5SP1M36DQ Features

* Supports bus operation up to 200 MHz

* Available speed grades are 200 and 166 MHz

* Registered inputs and outputs for pipelined operation

* 3.3V core power supply

* 2.5V/3.3V I/O power supply

* Fast clock-to-output times

* Provide high-perfor