MT4C1004J883C - 4 MEG x 1 DRAM FAST PAGE MODE
The MT4C1004J is a randomly accessed solid-state memory containing 4,194,304 bits organized in a x1 configuration.
During READ or WRITE cycles, each bit is uniquely addressed through the 22 address bits which are entered 11 bits (A0 -A10) at a time.
/R/A/S is used to latch the first 11 bits and /C/A
MT4C1004J883C Features
* Industry standard x1 pinout, timing, functions and packages
* High-performance, CMOS silicon-gate process
* Single +5V ± 10% power supply
* Low-power, 2.5mW standby; 300mW active, typical
* All inputs, outputs and clocks are fully TTL and CMOS compatible
