CY28347 Datasheet - Cypress Semiconductor

CY28347 Universal Single-chip Clock Solution

Pin 3 4 1 XIN XOUT FS0/REF0 VDD VDD [2] Name PWR I/O I O Description Oscillator Buffer Input. Connect to a crystal or to an external clock. Oscillator Buffer Output. Connect to a crystal. Do not connect when an external clock is applied at XIN. I/O Power-on Bidirectional Input/Output. At power-.

CY28347 Features

* Supports VIA P4M266/KM266 chipsets Supports Pentium® 4, Athlon processors Supports two DDR DIMMS Provides

* Two different programmable CPU clock pairs

* Six differential DDR SDRAM pairs

* Two low-skew/low-jitter AGP clocks

* Si

CY28347_CypressSemiconductor.pdf