Description
57 CY7C455 CY7C456 CY7C457 512 x 18, 1K x 18, and 2K x 18 Cascadable Clocked FIFOs with Programmable Flags .
The CY7C455, CY7C456, and CY7C457 are high-speed, low-power, first-in first-out (FIFO) memories with clocked read and write interfaces.
Features
* High-speed, low-power, first-in first-out (FIFO) memories
* 512 x 18 (CY7C455)
* 1,024 x 18 (CY7C456)
* 2,048 x 18 (CY7C457)
* 0.65 micron CMOS for optimum speed/power
* High-speed 83-MHz operation (12 ns read/write cycle time)
* Low power
Applications
* Clock frequencies up to 83.3 MHz are achievable in the standalone configuration, and up to 83.3 MHz is achievable when FIFOs are cascaded for depth expansion. Depth expansion is possible using the cascade input (XI), cascade output (XO), and First Load (FL) pins. The XO pin is connected to the XI p
